From ba08a5c6286346efe26997f55b508bfb54843dc4 Mon Sep 17 00:00:00 2001
From: "rn@wyvis.research.intel-research.net"
 <rn@wyvis.research.intel-research.net>
Date: Sun, 16 Mar 2003 12:30:28 +0000
Subject: [PATCH] bitkeeper revision 1.140 (3e746e649qRG4zMj_6-1prPYQZwRrw)

sanity check for long APIC ISR
---
 xen/arch/i386/apic.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/xen/arch/i386/apic.c b/xen/arch/i386/apic.c
index e8e25e7f17..e90c17e0c9 100644
--- a/xen/arch/i386/apic.c
+++ b/xen/arch/i386/apic.c
@@ -46,6 +46,8 @@
 #include <asm/pgalloc.h>
 #include <asm/hardirq.h>
 #include <asm/apic.h>
+
+#include <asm/timex.h>
 #include <xeno/ac_timer.h>
 #include <xeno/perfc.h>
 
@@ -746,6 +748,8 @@ unsigned int apic_timer_irqs [NR_CPUS];
 void smp_apic_timer_interrupt(struct pt_regs * regs)
 {
     int cpu = smp_processor_id();
+    u32 cc_start, cc_end;
+    rdtscl(cc_start);
 
     /*
      * the NMI deadlock-detector uses this.
@@ -766,6 +770,10 @@ void smp_apic_timer_interrupt(struct pt_regs * regs)
 
     if (softirq_pending(cpu))
         do_softirq();
+
+    rdtscl(cc_end);
+    if ( (cc_end - cc_start) > (cpu_khz * 100) )
+        printk("APIC Long ISR on CPU=%02d %08X -> %08X\n",cpu,cc_start,cc_end);
 }
 
 /*
-- 
2.30.2